IDT74LVC112APG datasheet
IDT74LVC112APG manufactured by:
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3.3V CMOS Dual Negative-Edge-Triggered J-K Flip-Flop with Clear and Preset, 5.0V Tolerant I/O | Download IDT74LVC112APG datasheet from IDT |
pdf 76 kb |
IDT74LVC112A | View IDT74LVC112APG to our catalog | IDT74LVC112APG8 |